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| 1 of 24 112299 features provides unique id number to battery packs eliminates thermistors by sensing battery temperature on-chip elapsed time counter provides indication of battery usage/storage time time/temperature histogram function provides essential information for determining battery self-discharge 256-bit nonvolatile user memory available for storage of user data such as gas gauge and manufacturing information. operating range of -40c to +85c applications include portable computers, portable/cellular phones, consumer electronics, and handheld instrumentation. package outline pin description gnd - ground dq - data in/out v dd - supply voltage nc - no connect description the DS2435 battery identification chip with time/temperature histogram provides a convenient method of tagging and identifying battery packs by manufacturer, chemistry, or other identifying parameters. the DS2435 allows the battery pack to be coded with a unique identification number and also store information regarding the battery life and charge/discharge characteristics in its nonvolatile memory. the DS2435 performs the essential function of monitoring battery temperature without the need for a thermistor in the battery pack. a time/temperature histogram function stores the amount of time that the battery has been in one of its eight user definable temperature bands, allowing more accurate self- discharge calculations to be carried out by the user for determining remaining battery capacity. the on- board elapsed time counter provides a method that can even determine the amount of time that a battery pack has been in storage, allowing for a more accurate self-discharge determination. DS2435 battery identification chip with time/temperature histogram www.dalsemi.com bottom view 2 3 1 DS2435s 16-pin ssop see mech. drawings section dq nc nc nc nc nc nc gnd v dd nc nc nc nc nc nc gnd 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 dallas DS2435 gnd dq vdd see mech. drawings section pr-35 package 123 preliminary
DS2435 2 of 24 information is sent to/from the DS2435 over a 1-wire interface, reducing the number of battery pack connectors to only three; power, ground, and the 1-wire interface. detailed pin description pin 16-pin ssop pin pr-35 symbol description 8, 9 1 gnd ground pin. 12dq data input/output pin - for 1-wire communication port. 16 3 v dd supply pin - input power supply. 2-7, 10-15 - nc no connect overview the DS2435 has six major components: 1) scratchpad memory, 2) nonvolatile memory, 3) on-board sram, 4) temperature sensor, 5) id register, and 6) elapsed time counter. all data is read and written least significant bit first. access to the DS2435 is over a 1-wire interface. charging parameters, battery chemistry, gas gauge information, and other user data would be stored in the DS2435, allowing this information to remain permanently in the battery pack. nonvolatile (e 2 ) ram holds information even if the battery goes dead; as long as the battery remains within typical charge/discharge operating range, the sram provides battery-backed storage of information. DS2435 block diagram figure 1 DS2435 3 of 24 overview - time/temperature histogram periods of storage are normal for most battery-powered applications. during this storage time, little or no current is actually drawn from the battery; batteries will, however, lose capacity during this storage time due to parasitic side reactions in the cell and other electrochemical mechanisms. this loss of capacity is termed self-discharge. since self-discharge is the result of electrochemical reactions, its rate is dependent upon the cell temperature. knowing the time spent in certain temperature ranges during the storage time of the battery, these temperature effects may be factored into a calculation of self-discharge for the battery. this will allow a more accurate determination of retained battery capacity. the DS2435 measures, tabulates, and stores this information in the battery pack. it periodically measures the battery temperature, and updates the appropriate temperature ?bin? of the time/temperature histogram with the time spent in that temperature range. the resulting histogram data could appear graphically as shown in figure 2. the DS2435 allows for eight temperature ranges, or bins, to be specified by fixing the values of the bin limits, ta through tg. once specified, the time spent in each of the bins (bin 1 being anything less than ta, bin 2 being temperature greater than or equal to ta but less than tb, etc., and bin 8 being anything greater than or equal to tg) is recorded (t 1 being the time spent in bin 1, t 2 the time spent in bin 2, etc.). using this information and data from the battery manufacturer regarding retained capacity, the actual battery capacity remaining may be closely approximated by the user. time/temperature histogram figure 2 DS2435 4 of 24 memory the DS2435?s memory is divided into five pages, each page filling 32 bytes of address space. not all of the available addresses are used, however. refer to the memory map of figure 4 to see actual addresses which are available for use. the first three pages of memory consist of a scratchpad ram and then either a nonvolatile ram (pages 1 and 2) or sram (page 3). the scratchpads help insure data integrity when communicating over the 1- wire bus. data is first written to the scratchpad where it can be read back. after the data has been verified, a copy scratchpad command will transfer the data to the ram (nv or sram). this process insures data integrity when modifying the memory. the fourth page of memory consists of registers which contain the measured temperature value, time/temperature histogram registers, elapsed time counter, and status registers for the device; these registers are made from sram cells. the fifth page of memory holds the id number for the device, the cycle count registers and the histogram bin limits in e 2 ram, making these registers nonvolatile under all power conditions. page 1 the first page of memory has 24 bytes. it consists of a scratchpad ram and a nonvolatile (e 2 ) ram. these 24 bytes may be used to store any data the user wishes; such as battery chemistry descriptors, manufacturing lot codes, gas gauge information, etc. the nonvolatile portion of this page may be locked to prevent data stored here from being changed inadvertently. both the nonvolatile and the scratchpad portions are organized identically, as shown in the memory map of figure 4. in this page, these two portions are referred to as nv1 and sp1, respectively. page 2 the second page of memory has 8 bytes. it consists of a scratchpad ram and a nonvolatile (e 2 ) ram. these 8 bytes may be used to store any data the user wishes, such as battery chemistry descriptors, manufacturing lot codes, gas gauge information, etc. page 3 the third page of memory has a full 32 bytes. it consists of a scratchpad ram and an sram. this address space may be used to store any data the user wishes, such as gas gauge and self-discharge information. should the battery go dead and power to the DS2435 is lost, this data may also be lost. data which must remain even if power to the DS2435 is lost should be placed in either page 1 or page 2. page 4 the fourth page of memory is used by the DS2435 to store the converted value of battery temperature, the time/temperature histogram data, and the elapsed time counter. a 2-byte status register is also provided. temperature registers (60h-61h) the DS2435 can measure temperature without external components. the resulting temperature measurement is placed into two temperature registers. these registers are sram, and therefore will hold the values placed in them until the battery voltage falls below the minimum v dd specified. the first register, at address 60h, provides ?c resolution for temperatures between 0c and 127 ?c, formatted as follows: DS2435 5 of 24 the second register, at address 61h, provides 1c resolution over the -40c to +85c range, formatted as follows in the binary two?s complement coding as shown in table 1: temperature/data relationships table 1 temperature digital output (binary) digital output (hex) +85c 01010101 55h +25c 00011001 19h 1c 00000001 01h 0c 00000000 00h -1c 11111111 ffh -25c 11100111 e7h -40c 11011000 d8h status/control register (62h-63h) the status register is a 2-byte register at addresses 62h and 63h (consisting of sram). address 62h is the least significant byte of the status register, and is currently the only address with defined status bits; the other byte at address 63h is reserved for future use. the status register is formatted as follows: where x = don?t care tb = temperature busy flag. 1 = temperature conversion in progress; 0 = temperature conversion complete, valid data in temperature register. nvb = nonvolatile memory busy flag. 1 = copy from scratchpad to nvram in progress, 0 = nonvolatile memory is not busy. a copy to nvram may take from 2 ms to 10 ms (taking longer at lower supply voltages). lock = 1 indicates that nv1 is locked; 0 indicates that nv1 is unlocked. DS2435 6 of 24 t 1 -t 8 registers (64h-73h) these registers hold the accumulated time values for the time/temperature histogram. t 1 corresponds to the time spent in histogram bin 1, t 2 the time spent in bin 2, etc., where the bins are defined by the limits set in ta-tg as shown in figure 2. the format for the time value stored in these two-byte registers depends upon the sample rate, and is defined in the paragraph describing the sample rate parameter. t register (74h-76h) this 3-byte register is the elapsed time counter, formatted as follows: the elapsed time counter has an lsb value of 1 minute; the total time which the counter can accommodate is 2 24 minutes, or 31.92 years. issuing any protocol to the DS2435 prevents the incrementing of the elapsed time counter and histogram registers until the protocol is cleared by issuing a reset. therefore, it is imperative that any protocol issued to the DS2435 be followed by a reset (either after the protocol, if it requires no data, or immediately following the required data). this is necessary to avoid contention between the counter and histogram writing process and external processes. page 5 the fifth page of memory holds the battery manufacturer id number, a 2-byte counter for counting the number of battery charge/discharge cycles, histogram bin limits, and sample rate. id register (80h and 81h) the id register is a 16-bit rom register that can contain a unique identification code, if purchased from dallas semiconductor. this id number is programmed by dallas semiconductor, is unchangeable, and is unique to each customer. this id number may be used to ensure that batteries containing a DS2435 have the same manufacturer id number as a charger configured to operate with that battery pack. this feature may be used to prevent charging of batteries for which the charging circuit has not been designed. cycle counter (82h and 83h) the cycle counter register gives an indication of the number of charge/discharge cycles the battery pack has been through. this nonvolatile (e 2 ) register is incremented by the user through the use of a protocol to the DS2435, and is reset by another protocol. the counter is a straight binary counter, formatted as follows: DS2435 7 of 24 ta-tg registers (84h-8ah) these registers define the boundaries for the temperature bins in the time/temperature histogram, as shown in figure 2. these temperature values are expressed in the same temperature format as shown in table 1. these limits therefore may be positive or negative values, expressed with 1 c resolution. the bin limits must be specified in increasing order (i.e., ta DS2435 8 of 24 DS2435 memory partitioning figure 3 DS2435 9 of 24 DS2435 addressable ram memory map figure 4 DS2435 10 of 24 DS2435 addressable ram memory ram (cont'd) figure 4 DS2435 11 of 24 example codes for 771 hours, 22.5 minutes with different sample rates table 2 sample rate t x byte 1 t x byte 2 1/8 00011000 00011011 1/4 00001100 00001101 1/2 00000110 00000110 1 00000011 00000011 memory function commands the protocols necessary for accessing the DS2435 are described in this section. these are summarized in table 3, and examples of memory functions are provided in tables 4 and 5. page 1 through page 3 commands read scratchpad [11h] this command reads the contents of the scratchpad ram on the DS2435. this command is followed by a start byte address. after issuing this command and providing the start address, the user may begin reading the data. the user may read data through the end of the scratchpad space (address 5fh), with any reserved data bits reading all logic 1s. once the end of the scratchpad is reached the data in address 5fh will be read repeatedly until termination of the read scratchpad command. write scratchpad [17h] this command writes to the scratchpad ram on the DS2435. this command is followed by a start byte address. after issuing this command and providing the start address, the user may begin writing data to the DS2435 scratchpad at the starting byte address. copy sp1 to nv1 [22h] this command copies the entire contents (24 bytes) of scratchpad 1 (sp1) to its corresponding nonvolatile memory (nv1). the nonvolatile ram memory of the DS2435 cannot be written to directly by the bus master; however, the scratchpad ram may be copied to the nonvolatile ram. this prevents accidental overwriting of the nonvolatile ram and allows for the data to be written first to the scratchpad, where it can be read back and verified before copying to the nonvolatile ram. this command does not use a start address; the entire contents of the scratchpad will be copied to the nonvolatile ram. the nvb bit will be set when the copy is in progress. nv1 is made with e 2 type memory cells that will accept at least 50000 changes. copy sp2 to nv2 [25h] this command copies the entire contents (8 bytes) of sp2 (user bytes) to its corresponding nonvolatile memory (nv2). this command does not use a start address; the entire contents of sp2 will be copied to nv2. the nvb bit will be set when the copy is in progress. nv2 is made with e 2 type memory cells that will accept at least 50000 changes. copy sp3 to sram [28h] this command copies the entire contents (32 bytes) of sp3 to its corresponding sram. this command does not use a start address; the entire contents of sp3 will be copied to the sram. DS2435 12 of 24 copy nv1 to sp1 [71h] this command copies the entire contents (24 bytes) of nv1 to its corresponding scratchpad ram (sp1). this command does not use a start address; the entire contents of nv1 will be copied to sp1. the nonvolatile ram memory of the DS2435 cannot be read directly by the bus master; however, the nonvolatile ram may be copied to the scratchpad ram. copy nv2 to sp2 [77h] this command copies the entire contents (8 bytes) of nv2 (user bytes) to its corresponding scratchpad ram (sp2). this command does not use a start address; the entire contents of nv2 will be copied to sp2. the non-volatile ram memory of the DS2435 cannot be read directly by the bus master; however, the nonvolatile ram may be copied to the scratchpad ram. copy sram to sp3 [7ah] this command copies the entire contents (32 bytes) of sram to its corresponding scratchpad ram (sp3). this command does not use a start address; the entire contents of sram will be copied to sp3.the sram memory of the DS2435 cannot be read directly by the bus master; however, the sram may be copied to the scratchpad ram. lock nv1 [43h] this command prevents copying sp1 to nv1 and sets the lock bit. this is done as an added measure of data security, preventing data from being changed inadvertently. nv1 may be copied up into sp1 while the part is locked. this allows nv1 to be read at any time. however, nv1 cannot be written to through a copy sp1 to nv1 command without first unlocking the DS2435. unlock nv1 [44h] this command unlocks nv1 to allow copying sp1 into nv1. this is done as an added measure of data security, preventing data from being changed inadvertently. page 4 and 5 commands convert t [d2h] this command instructs the DS2435 to initiate a temperature conversion cycle. this sets the tb flag. when the temperature conversion is done, the tb flag is reset and the current temperature value is placed in the temperature register. while a temperature conversion is taking place, all other memory functions are still available for use. reset histogram [e1h] this command resets the accumulated time in all of the histogram temperature registers to zero. in addition, this command also resets the elapsed time counter to 0. this command does not use a start address; no further data is required. set clock [e6h] this command sets the elapsed time counter to a preset value. this command is followed by three bytes of data, which will be stored at addresses 74h-76h. the transfer of this 3-byte value will occur after reception of the 24 th bit following the protocol, at which time the elapsed time counter will begin incrementing the counter registers in 1-minute increments. DS2435 13 of 24 write registers [efh] this command allows writing directly to the ta-tg registers and the sample rate register. this command is followed by a start byte address. after issuing this command and providing the start address, the user may begin writing the data. read registers [b2h] this command reads the contents of the registers in page 4 and 5. this command is followed by a start byte address. after issuing this command and providing the start address, the user may begin reading the data. the user may read data through the end of the register space (through address 76h in page 4, address 8bh in page 5), after which the data read will be all logic 1s. increment cycle [b5h] this command increments the value in the cycle counter register. this command does not use a start address; no further data is required. reset cycle counter [b8h] this command is used to reset the cycle counter register to zero, if desired. DS2435 14 of 24 DS2435 command set table 3 instruction description protocol 1-wire bus master status after issuing protocol 1-wire bus data after issuing protocol page 1 through page 3 memory commands read scratchpad reads bytes from DS2435 scratchpad. 11h DS2435 15 of 24 page 4 and page 5 register commands read registers reads bytes from temperature, status and id registers. b2h DS2435 16 of 24 memory function example table 4 example: bus master writes 24 bytes of data to DS2435 scratchpad, then copies to it to nv1. master mode data (lsb first) comments tx reset reset pulse (480-960 s) rx presence presence pulse tx 17h issue ?write scratchpad? command tx 00h start address tx <24 bytes> write 24 bytes of data to scratchpad tx reset reset pulse rx presence presence pulse tx 11h issue ?read scratchpad? command tx 00h start address rx <24 data bytes> read scratchpad data and verify tx reset reset pulse rx presence presence pulse tx 22h issue ?copy sp1 to nv1? command rx DS2435 17 of 24 1-wire bus system the DS2435 1-wire bus is a system which has a single bus master and one slave. the DS2435 behaves as a slave. the DS2435 is not able to be multidropped, unlike other 1-wire devices from dallas semiconductor. the discussion of this bus system is broken down into three topics: hardware configuration, transaction sequence, and 1-wire signaling (signal types and timing). hardware configuration the 1-wire bus has only a single line by definition; it is important that each device on the bus be able to drive it at the appropriate time. to facilitate this, each device attached to the 1-wire bus must have open drain or 3-state outputs. the 1-wire port of the DS2435 is open drain with an internal circuit equivalent to that shown in figure 6. the 1-wire bus requires a pullup resistor of approximately 5 k ? . the idle state for the 1-wire bus is high. if for any reason a transaction needs to be suspended, the bus must be left in the idle state if the transaction is to resume. if this does not occur and the bus is left low for more than 480 s, all components on the bus will be reset. transaction sequence the protocol for accessing the DS2435 via the 1-wire port is as follows: ? initialization ? memory function command ? transaction/data initialization all transactions on the 1-wire bus begin with an initialization sequence. the initialization sequence consists of a reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). the presence pulse lets the bus master know that the DS2435 is on the bus and is ready to operate. for more details, see the ?i/o signaling? section. hardware configuration figure 5 i/o signaling the DS2435 requires strict protocols to insure data integrity. the protocol consists of several types of signaling on one line: reset pulse, presence pulse, write 0, write 1, read 0, and read 1. all of these signals, with the exception of the presence pulse, are initiated by the bus master. DS2435 18 of 24 the initialization sequence required to begin any communication with the DS2435 is shown in figure 7. a reset pulse followed by a presence pulse indicates the DS2435 is ready to send or receive data given the correct memory function command. the bus master transmits (tx) a reset pulse (a low signal for a minimum of 480 s). the bus master then releases the line and goes into a receive mode (rx). the 1-wire bus is pulled to a high state via the 5k pullup resistor. after detecting the rising edge on the i/o pin, the DS2435 waits 15-60 s and then transmits the presence pulse (a low signal for 60-240 s). read/write time slots DS2435 data is read and written through the use of time slots to manipulate bits and a command word to specify the transaction. write time slots a write time slot is initiated when the host pulls the data line from a high logic level to a low logic level. there are two types of write time slots: write 1 time slots and write 0 time slots. all write time slots must be a minimum of 60 s in duration with a minimum of a 1 s recovery time between individual write cycles. the DS2435 samples the i/o line in a window of 15 s to 60 s after the i/o line falls. if the line is high, a write 1 occurs. if the line is low, a write 0 occurs (see figure 6). for the host to generate a write 1 time slot, the data line must be pulled to a logic low level and then released, allowing the data line to pull up to a high level within 15 s after the start of the write time slot. for the host to generate a write 0 time slot, the data line must be pulled to a logic low level and remain low for the duration of the write time slot. read time slots the host generates read time slots when data is to be read from the DS2435. a read time slot is initiated when the host pulls the data line from a logic high level to logic low level. the data line must remain at a low logic level for a minimum of 1 s; output data from the DS2435 is then valid for the next 14 s maximum. the host therefore must stop driving the i/o pin low in order to read its state 15 s from the start of the read slot (see figure 8). by the end of the read time slot, the i/o pin will pull back high via the external pullup resistor. all read time slots must be a minimum of 60 s in duration with a minimum of a 1 s recovery time between individual read slots. figure 9 shows that the sum of t init , t rc , and t sample must be less than 15 s. figure 10 shows that system timing margin is maximized by keeping t init and t rc as small as possible and by locating the master sample time towards the end of the 15 s period. DS2435 19 of 24 initialization procedure "reset and presence pulses" figure 6 read/write timing diagram figure 7 DS2435 20 of 24 detailed master read 1 timing figure 8 recommended master read 1 timing figure 9 DS2435 21 of 24 absolute maximum ratings* voltage on any pin relative to ground -0.3v to +7.0v operating temperature -40c to +85c storage temperature -55c to +125c soldering temperature 260c for 10 seconds * this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. recommended dc operating conditions (-40 c to +85 c) parameter symbol condition min typ max units notes supply voltage v dd i/o functions nv copy functions ?oc accurate temp. conversions 2.5 2.7 3.6 6.4 6.4 6.4 v 1 data pin v i/o -0.3 v dd +0.3 v dc electrical characteristics (-40 c to +85 c; v dd =3.6v to 6.4v) parameter symbol condition min typ max units notes temperature accuracy (=t actual - t measured ) t a =0oc to 70oc t a -40oc to 0oc and +70oc to +85oc ? see typical curve oc 3 input logic high v ih v dd =4.8v 2.2 v dd +0.3 v input logic low v il v dd =4.8v -0.3 +0.8 v sink current i l v i/o =0.4v -4.0 ma standby current i q clock running 10 25 a 4 active current i dd temp conversions 1.5 ma 4 input resistance r i 500 k ? 2 notes: 1. temperature conversion will work with 2c accuracy down to v dd =2.7v. 2. i/o line in ?hi-z? state and i i/o =0. resistance specified from i/o to ground. 3. see typical curve for specification limits outside 0c to 70c range. thermometer error reflects sensor accuracy as tested during calibration. 4. specified with dq=v dd . 5. the bus should not remain idle for more than 20 ms between bits or between a bit and a reset. DS2435 22 of 24 ac electrical characteristics 1-wire interface (-40 c to +85 c; v dd =3.6v to 6.4v) parameter symbol min typ max units notes temperature conversion time t conv 250 500 ms time slot t slot 60 120 s recovery time t rec 1 20000 s 5 write 0 low time t low0 60 120 s write 1 low time t low1 115 s read data valid t rdv 15 s reset time high t rsth 480 s reset time low t rstl 480 s presence detect high t pdhigh 15 60 s presence detect low t pdlow 60 240 s capacitance c in/out 25 pf timer accuracy 10 % 1-wire write 1 time slot 1-wire write 0 time slot DS2435 23 of 24 1-wire read 0 time slot 1-wire reset pulse 1-wire presence detect DS2435 24 of 24 typical performance curve |
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